Hardware

Design Files: (schematics, assembly, kitting list)

 

  FEDv3 Production Schematics

 

 LATEST Channel Numbering vs Component Designators (xls)

 

---------------------------------------------------------------------------

Archived Information

FEDv1 (PC3205M1) Master versions are in ESSG Information Database

(released Dec 2002 ; sheets are dated 13-11-02 and are NOT marked Preliminary)

Local copies (with netlists) are here here

 

Change List for DDi production March 2004

Component Data Sheets  (spec sheets,  links to manufacturers ...etc)

 

Additional FEDv1 Layout Notes

Draft: Layout Notes & Assembly Notes & Power Layout Notes (03.09.02)

Board Level: Change list (04.09.02)

CALICE change list (11.09.2003)

 

FE Analogue & Power Block

Rob's Analogue Circuit Design Slides (March 2002)

James's Draft Design Note (Sept 2002)

Talk from Stephanos Dris on Analogue Characterisation with OptoRx (Tracker week July 2004)

 

Power Block

Change list (09.07.02) | Timing | Fault Finding instructions (25.03.03)

De-coupling scheme (17.07.02)

Power Distribution diagram (27.02.2002)

 

Boundary Scan & FPGA Configuration: JTAG chain (11.11.02)

Clocks & Resets: Clock chain ; Clock Resets

Front-Panel Drawings (zip);   OptoRx hole changes request (Jan Troska 15.06.2004)

Air Deflector / Strengthening Bar Drawing

ADC Online Design Tools

Opto Receiver: Receiving Amplifier spec | NGK Analogue Receiver spec | Helix ASIC spec | Helix ASIC Behaviou


Back to Project Documentation